OpenAI Built Its First AI Chip Using Its Own AI, And Did It in Under 20 Months

The Jalapeño chip promises to cut response times by up to 3.6 times compared to the Nvidia hardware OpenAI currently relies on. The wilder story is how a team of fewer than 100 people built it so fast.

AI2Day NewsdeskEditor: Lee Brown4 min read
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Key points

  • OpenAI unveiled Jalapeño, its debut custom AI accelerator chip (a specialised processor designed to run AI models quickly and cheaply), on 25 August.
  • Jalapeño delivers up to 13.4 petaflops of 4-bit compute and connects to 232 gigabytes of high-end memory at 15.4 terabytes per second.
  • OpenAI benchmarks show Jalapeño can cut end-to-end response time by up to 3.6 times compared to Nvidia's GB300 chip, while using less power.
  • The chip went from first design concept to finished silicon ready for manufacturing in under 20 months, with a team that averaged fewer than 100 people.
  • OpenAI's own AI models, including early versions of technology related to GPT-6 Astra, helped write and verify much of the chip's design code.

Chip design is one of the most expensive, slow, and failure-prone engineering disciplines on earth. It normally takes years and armies of specialists. OpenAI just did it in under 20 months with a team that could fit in a large conference room.

The chip is called Jalapeño, and OpenAI gave it a full public reveal on 25 August. The headline numbers are strong: 13.4 petaflops of processing power (that is 13.4 thousand trillion floating-point calculations per second), access to 232 gigabytes of cutting-edge memory, and a claimed 3.6 times reduction in the delay between sending a prompt and receiving a finished response, all compared to the Nvidia GB300 chips OpenAI currently rents from data centres. Jalapeño also draws less power to do it.

Whether those benchmark figures hold up once Jalapeño runs at scale in OpenAI's real-world infrastructure is a fair question. But the manufacturing speed is the part that experts find harder to dismiss.

How did a team of fewer than 100 people move so fast?

They used OpenAI's own AI models to accelerate almost every stage of the design process. The team averaged fewer than 100 people across the whole project, a fraction of the headcount a typical chip programme requires.

OpenAI VP of hardware Richard Ho put it plainly: "The models are giving superpowers to our engineers. Our engineers are still driving the work, they're still the final arbiter of what's going on. But they can do things a lot faster, they can explore a lot more paths."

The front-end workflow, meaning the part of chip design that turns an idea into a formal description of how the chip's logic should work, was built around a Google-originated open-source tool called XLS (Accelerated Hardware Synthesis). XLS lets engineers write in familiar programming languages rather than specialised hardware code. OpenAI's AI models turned out to be very good at working with XLS because the tool reads and writes similarly to ordinary software code, which is exactly the kind of text those models were trained on.

OpenAI's chip design partner Broadcom, the established semiconductor company, handled the "back end": taking OpenAI's logic design and turning it into a physical chip that can actually be manufactured. David Chin, co-founder of chip design start-up Verkor.io, told IEEE Spectrum that Broadcom's involvement was essential. "If you have somebody else start from scratch, it won't be possible," he said.

What does AI actually do inside a chip design project?

AI code-writing is the key contribution. When the first physical chips came back from the foundry in May, OpenAI pointed its AI models at writing optimisation software for the chip. On one standard benchmark test, performance jumped from 0.31 percent of the chip's theoretical ceiling to 88.94 percent in roughly 40 hours.

The team also had access to models that were early versions of GPT-6 Astra (OpenAI's next major model, released publicly on 3 September 2026). Those newer models could work directly in Verilog, the low-level language used to describe hardware, without needing the XLS translation step. That's a meaningful shift: it means the AI is getting closer to operating professional chip design tools on its own.

Ho confirmed the team also used internal AI models fine-tuned specifically for chip design that are not available to the public.

Specification Jalapeño figure
Peak 4-bit compute 13.4 petaflops
On-chip memory 232 GB
Memory bandwidth 15.4 TB/s
Latency vs Nvidia GB300 Up to 3.6x faster
Concept to silicon Under 20 months
RTL to tapeout 9 months

Andrew Kahng, a distinguished professor at UC San Diego who studies chip design automation, called OpenAI's pace "likely best in class today" but noted the timeline could soon look slow as AI models improve further.

That's the part worth watching. OpenAI says the lessons from Jalapeño will feed back into its commercial AI models. "It's safe to say that Astra and following models will be very good at chip design," Ho said. The chip builds the model; the model builds the next chip. That loop is only getting tighter.

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